Top Tech Jobs & Startup Jobs in Vancouver

Lead ASIC implementation with a primary focus on Design-for-Test. Drive DFT requirements across RTL, physical design, implementation, signoff, and post-silicon validation. Responsibilities include scan insertion, ATPG, gate-level timing simulation, pattern translation, ATE collaboration, DFT logic and IP integration, JTAG protocols, timing constraints, and debug of next-generation networking chips.

Leads ASIC physical design and full-chip implementation from RTL through GDSII, including floorplanning, partitioning, power-grid planning, placement and routing, timing closure, power integrity, physical verification, and equivalence checks. Collaborates with architecture, package, RTL, DFT, EDA, foundry, and IP teams to optimize performance, power, and die size. Enhances design methodologies and validates signoff processes for advanced-node tapeouts.

Lead end-to-end delivery of complex backend software projects for high-throughput distributed data-processing systems. Define technical vision, write designs, develop and test software, automate deployments, resolve production bottlenecks, conduct code reviews, improve maintainability, and participate in on-call support. The role also involves mentoring engineers, influencing technical strategy, and scaling streaming ingestion pipelines.

Leads Cisco’s security solutions design and technical sales engineering team across Canada. Develops and executes security sales strategies, builds executive customer and partner relationships, presents business and technical value, and supports revenue growth. Oversees recruitment, mentoring, performance management, and solution development across identity, cloud, network, endpoint, XDR, SIEM, and SOAR capabilities. Partners with sales and cross-functional leadership to position Cisco security solutions competitively and deliver integrated architectures.

Develop production software for Splunk AI Canvas using TypeScript, JavaScript, React, backend APIs, and cloud services. Build secure, multi-tenant AI agents and agentic workflows that support customer investigations and operational tasks. Design, test, debug, monitor, and improve accessible user experiences throughout the software lifecycle while collaborating with product, design, and engineering teams.

Leads strategy, planning, and operational execution for Cisco’s Canada Solutions Engineering organization. Partners with engineering and sales leadership to align growth strategies, monitor KPIs, analyze performance, identify risks, and drive corrective actions. Coordinates across sales, marketing, architecture, and global engineering teams while developing talent, mentoring leaders, and advocating for the Canadian SE community. Requires strategic planning, data analysis, Salesforce proficiency, cross-functional leadership, and experience supporting high-performance organizations.

Lead architecture and development for a cloud-native, multi-region data ingestion platform built with Go and Kubernetes. Own distributed systems design, reliability, observability, security, scalability, production operations, and on-call support. Establish reusable integration patterns, improve engineering quality, mentor developers, lead technical decisions, and collaborate with product, infrastructure, security, compliance, support, and field teams.

Lead the architecture and development of high-throughput, fault-tolerant distributed systems powering Splunk data ingestion. Set technical direction, drive reliability and scalability roadmaps, mentor senior engineers, influence multi-team architecture decisions, and own systems from design through deployment, observability, incident response, and operations. The role requires deep experience with distributed systems, observability pipelines, cloud platforms, capacity planning, and technical leadership at Staff or Principal level.

Design, simulate, lay out, measure, and productize high-speed analog and mixed-signal CMOS ICs for optical communications. Lead complex chip blocks, mentor engineers, track deliverables, conduct peer reviews, and establish design methodology through production. Collaborate with RF, digital/DSP, packaging, hardware, and module teams to meet signal and power integrity requirements. Perform laboratory validation, characterization, and advanced layout and manufacturability analysis.

Lead architecture, design, layout, measurement and productization of ultra-deep-submicron CMOS mixed-signal ICs for high-speed optical transceivers. Mentor engineers, manage a large block on complex chips, collaborate with package/hardware teams for signal and power integrity, and drive designs from concept to production.