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Reposted YesterdaySaved
In-Office
2 Locations
Senior level
Senior level
Artificial Intelligence • Machine Learning
Design and optimize DSP algorithms for high-speed communication systems, collaborate with cross-functional teams, conduct simulations, and document processes.
Top Skills: FpgaMatlabSimulinkSystem Verilog
Reposted 3 Days AgoSaved
In-Office
3 Locations
Senior level
Senior level
Artificial Intelligence • Machine Learning
The Senior SoC Design & Integration Engineer will design, integrate, and implement SoCs focusing on high-speed interfaces and IP verification, coordinating among teams for seamless integration and post-silicon validation.
Top Skills: AxiCdcCxlDdrEda ToolsLintPciePythonRdcRtlSystemverilogTclUcieVerilog
Reposted 9 Days AgoSaved
In-Office
3 Locations
Senior level
Senior level
Artificial Intelligence • Machine Learning
Develop and optimize low-power digital designs for ASICs and SoCs, ensuring timing closure and conducting post-silicon validation while collaborating with cross-functional teams.
Top Skills: Verilog,Systemverilog,Eda Tools,Genus,Tempus,Dc,Primetime,Conformal Lec,Tcl,Perl,Python
Reposted 10 Days AgoSaved
In-Office
2 Locations
Senior level
Senior level
Artificial Intelligence • Machine Learning
As a Principal Design Engineer, you'll architect high-performance SoC components, lead RTL design and integration, and optimize for power and performance, collaborating closely with cross-functional teams.
Top Skills: AxiCxlDdrHbmNocPciePerlPythonSystemverilogTclUcie
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