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Design and own IO/pad ring and bump pattern planning for SoC storage and memory controllers. Produce physical-design handoff deliverables, ensure compliance with package constraints, collaborate across architecture, IP, implementation, foundry, and support verification, emulation, validation, and silicon debug.

The role involves defining Mixed-Signal IP requirements, managing integration processes, supporting debug for analog circuits, and designing CMOS integrated circuits.

As a Technical Staff Engineer - Design, you will lead complex digital integrated circuit design in PCIe switches, mentor engineers, and resolve technical issues.

Design and verify RTL for DDR/Flash controller and PHY subsystems through full ASIC lifecycle. Implement RTL, run CDC/lint/power analysis, collaborate on STA timing closure, develop C drivers, support silicon bring-up, and produce design and test documentation.

As a Technical Staff Engineer, lead emulation strategies for Enterprise Flash Controllers, overseeing product development and collaborating across teams to innovate for next-gen data centers.