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As a Design Verification Engineer, you will verify Analog Mixed Signal designs, define and execute test plans, author test benches, create assertions and coverage metrics, and collaborate with RTL and Analog designers to ensure design correctness.

As a Signal and Power Integrity Engineer, you will work on packaging solutions for chiplet interconnects, focusing on design, modeling, and testing. You will collaborate with circuit designers for performance optimization, manage signal integrity simulations, and lead power delivery network designs while handling lab measurements and issues.

As a Digital Design Engineer, you will define and implement RTL for major chiplet blocks, ensuring high quality and supporting verification processes. You will collaborate with a cross-functional team to innovate and develop high-performance, manufacturable products, from design specification to silicon characterization.

The Senior Digital Design Engineer will develop micro-architecture specifications and RTL design descriptions for Ethernet PCS/PMA IPs. Responsibilities include optimizing designs for power, area, performance, collaborating with verification and physical design teams, and ensuring compliance with Ethernet standards. The role requires strong expertise in SystemVerilog and extensive experience in high-speed digital design.

As a Chip Lead, you will develop micro-architecture specifications for chiplet systems. You will collaborate with various teams including marketing, architecture, and cross-functional design teams to define chip functionality, interfaces, and performance targets, overseeing execution through tape-out and bring-up stages.