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Microchip Technology Inc.

Engineer II-Emulation

Posted Yesterday
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In-Office
Burnaby, BC, CAN
Junior
In-Office
Burnaby, BC, CAN
Junior
Performs hardware/software co-development and system-level co-verification of SoC devices using Cadence Palladium emulators and Protium FPGA platforms. Supports architectural exploration, pre- and post-silicon validation, functional verification, performance testing, power analysis, and investigations. Collaborates with architects, hardware designers, firmware engineers, and verification teams while developing automation, debugging RTL and embedded firmware, and troubleshooting server hardware and networking infrastructure.
The summary above was generated by AI

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

The Architecture Co-Verification team (ACOV) is an exciting, fast-paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry-leading HW emulators (such as Cadence Palladium) and FPGA based prototyping platforms (such as Cadence Protium). The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations. As an emulation Engineer, you will be working closely with architects, hardware designers, firmware engineers, and verification teams throughout the SoC development process. 

  

This is a role for a versatile engineer that enjoys the challenges of HW/FW co-development and system-level co-verification using leading-edge HW emulators and FPGA platforms. It’s a high-visibility role that will develop a wide range of skills and exceptional problem-solving abilities. 

Requirements/Qualifications:

  • BS/MS in Electrical/Electronic Engineering, Computer Science, or Computer Engineering.

  • Minimum two years or less of relevant work experience with Master's degree   

  • Excellent analytical and documentation skills. 

  • Strong problem solving, communication and interpersonal skills are required. 

  • Willing to learn in a fast-paced environment, being a self-starter, and organized. 

  • LINUX experience and strong programming and scripting skills with languages such as Python, Tcl, and C. 

  • Highly motivated team player who sets personal goals and achieves those goals with minimal supervision. 

  • Familiarity in C/C++ embedded FW development. 

  • Understanding of digital design, RTL coding, simulation and debug. Knowledge of MIPS, ARM and RISC-V CPUs architecture. 

  • Experience troubleshooting server system hardware and networking infrastructure to root cause issues.

Desirable: 

  • Experience with validation or verification of protocols such as PCIe, CXL, SAS/SATA and NVMe. 

  • Experience in memory technologies like DDR4/DDR5.

  • Familiarity in C/C++ embedded FW development. 

  • Understanding of digital design, RTL coding, simulation and debug. 

  • Knowledge of MIPS, ARM and RISC-V CPUs architecture. 

  • Experience troubleshooting server system hardware and networking infrastructure to root cause issues. 

  • Familiarity with Front-End design and implementation. 

  • Knowledge of source control systems such as subversion and/or Git. 

  • Experience with FPGA-based Verification/emulation. 

  • Experience with Computer System I/O hierarchies and interconnects (I2C, SPI/ eJTAG), specifically with PCIe protocols and infrastructure. 

  • Experience with test automation, testing methodologies, and test tools. 

  • Experience working in Linux and Windows Environments and file system structure.

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position is $76,000-$114,000.*

*Range is dependent on numerous factors including job location, skills and experience.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Microchip Technology Inc. Burnaby, British Columbia, CAN Office

Burnaby, Canada

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