Jobs at Microchip Technology Inc.

Lead customer platform enablement for PCIe switch products, support hyperscale and storage customers from board bring-up through production, debug hardware/firmware/system issues, develop reference designs and tools, deliver trainings, mentor engineers, and collaborate cross‑functionally to optimize system performance and reliability.

Develops and executes silicon and system validation plans for PCIe switches and NVMe controllers. Diagnoses hardware and software issues, builds test automation tools, debugs prototype ICs and boards, conducts lab investigations, reports defects, and collaborates with cross-functional teams. The role also leads complex test execution and mentors junior engineers.

Lead physical design and ASIC implementation for high-performance SoCs, including floorplanning, placement, clock tree synthesis, physical verification, synthesis, and static timing. Support chip-level, subsystem, CPU, and mixed-signal blocks while collaborating with CAD, packaging, design, operations, customers, and global teams. Develop digital wrappers, test structures, and scripting flows, troubleshoot implementation issues, guide team members, and support advanced semiconductor methodologies.

Lead end-to-end software architecture for a high-reliability 64-bit RISC-V multiprocessor SoC. Define standards, requirements traceability, security and performance benchmarks, design governance, verification evidence, and lifecycle processes. Mentor engineering teams, lead technical reviews, and represent architecture in customer discussions. The role requires expertise in embedded systems, RTOS, multiprocessor architectures, low-level programming, and avionics or automotive development.

Design, develop, integrate, debug, test, verify, and validate firmware, drivers, software components, and development tools for PCIe SoC products. Collaborate across firmware, chip design, emulation, validation, and applications engineering teams during pre-silicon and post-silicon development. Resolve customer and internal issues, lead technical reviews, maintain documentation, and mentor junior engineers.

Design, verify, emulate, debug, integrate, bring up, and validate digital ASICs and SoCs for storage and memory controllers. Work across block-, top-, and solution-level development, applying knowledge of SoCs, protocols, and standards. Responsibilities include pre-silicon verification, post-silicon validation, IP and solution debugging, and supporting products through production.

Design complex digital integrated circuits at block, subsystem, and device levels using Verilog and SystemVerilog. Define features and implementation details, support emulation and ASIC validation, debug laboratory issues, and develop logic modifications. Collaborate with distributed design, verification, and architecture teams to resolve technical problems and evaluate implementation trade-offs. Apply ASIC simulation, synthesis, timing analysis, physical design, protocol, and low-power methodology knowledge.

Characterize and optimize high-speed SERDES interfaces across process, voltage, and temperature extremes. Develop automated Python test scripts, custom firmware, PCBs, and laboratory hardware for electrical compliance testing. Analyze and debug mixed-signal circuits, identify root causes of failures, and recommend design improvements. Prepare characterization plans and technical reports while collaborating with mixed-signal designers on next-generation connectivity products.

Performs hardware/software co-development and system-level co-verification of SoC devices using Cadence Palladium emulators and Protium FPGA platforms. Supports architectural exploration, pre- and post-silicon validation, functional verification, performance testing, power analysis, and investigations. Collaborates with architects, hardware designers, firmware engineers, and verification teams while developing automation, debugging RTL and embedded firmware, and troubleshooting server hardware and networking infrastructure.

Leads customer platform enablement for PCIe switch products across data-center and AI systems. Responsibilities include defining technical requirements, supporting board bring-up and production release, debugging hardware, firmware, and system issues, developing technical collateral and software tools, delivering training, mentoring engineers, and collaborating with customers and cross-functional teams. The role also requires customer-site travel for system debugging, deployment support, and product integration.

The role involves defining Mixed-Signal IP requirements, collaborating with vendors, managing IP processes, and supporting lab testing for analog and mixed-signal circuits.

Design, develop, integrate, debug, and verify embedded SoC firmware. Specify firmware features and architecture, collaborate with chip design and validation teams for pre/post-silicon work, troubleshoot with debug tools, author design documentation and user guides, participate in code reviews, and improve development processes.

Design and own IO/pad ring and bump pattern planning for SoC storage and memory controllers. Produce physical-design handoff deliverables, ensure compliance with package constraints, collaborate across architecture, IP, implementation, foundry, and support verification, emulation, validation, and silicon debug.

The role involves defining Mixed-Signal IP requirements, managing integration processes, supporting debug for analog circuits, and designing CMOS integrated circuits.

As a Technical Staff Engineer - Design, you will lead complex digital integrated circuit design in PCIe switches, mentor engineers, and resolve technical issues.

Design and verify RTL for DDR/Flash controller and PHY subsystems through full ASIC lifecycle. Implement RTL, run CDC/lint/power analysis, collaborate on STA timing closure, develop C drivers, support silicon bring-up, and produce design and test documentation.