FPGA Machine Learning Overlay and Compiler Engineer

Join Altera, a pioneer in programmable logic solutions, where innovation meets practicality.  We empower system, semiconductor, and technology companies to rapidly and cost-effectively differentiate and excel in their markets. Our legacy of innovation is matched by our commitment to our clients, whom we serve through a robust distribution network and a dedicated sales force. Our portfolio spans programmable logic products, acceleration platforms, software, and IP, all designed to accelerate the pace of innovation. 

What You Will Do 

As an FPGA Machine Learning Overlay and Compiler Engineer, you will architect and implement soft IP blocks to accelerate advanced machine learning algorithms on our FPGAs, while also contributing to the compiler stack that targets these IPs. Our team creates integrated IP and software solutions that allow customers to deploy cutting-edge ML workloads on Altera FPGAs.

Your responsibilities will include:

• Designing and optimizing FPGA overlay IP, leveraging numerical precision flexibility, memory hierarchies, and advanced tensor DSP blocks.

• Enhancing compiler flows to efficiently map machine learning graphs onto our IP, ensuring high utilization and performance across diverse workloads.

• Evaluating forward-looking silicon architectures and adapting both IP and compiler features to take advantage of new, undisclosed hardware capabilities.

This role provides a unique opportunity to work at the intersection of hardware and compiler technology, enabling the next generation of machine learning acceleration on reconfigurable platforms.

The successful candidate will join a team with a strong, supporting culture. Our team in turn is part of a larger Altera site that is one of the largest engineering sites within Altera, and recognized for a fun, flexible, and high-performing culture.