Design and implement FPGA code for satellite digital payloads, including DSP algorithms, software-defined radio signal processing, embedded systems, and processor or peripheral interfaces. Responsibilities include developing custom IP, improving DSP and interface reliability, integrating vendor IP cores, supporting communications architecture, and participating in spacecraft design studies. The engineer will work across simulation, synthesis, place and route, timing closure, and hardware testing.
At Kepler Communications, we're not just imagining the future of on-demand space connectivity - we're leading it!
Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities.
Industry-leading technology is only part of the story. What sets Kepler apart is our team: bold thinkers, skilled builders, and passionate problem-solvers who thrive on pushing the boundaries of what’s possible in space. We believe great ideas come from diverse perspectives, and we’re committed to creating an environment where you can grow, lead, and make a global impact.
If you’re ready to reach higher, move faster, and do work that shapes the future space economy - this is your launchpad. Come build the future with Kepler!
What We Offer:
* Competitive compensation with a robust equity plan to share in our success.
* Comprehensive coverage for health, dental, and vision insurance—including dependents.
* Unlimited vacation, supportive parental leave policy, and company-wide holiday shutdown.
* Semi-annual company-wide parties and frequent in-office team events.
* Relocation packages available for approved roles.
* $1,500 annual professional development fund to support your growth.
* Fully stocked Toronto office kitchen with snacks, drinks, games and top-notch kitchen appliances.
* Town Halls, Celebration Calls, and Company-wide events to stay connected and engaged.
* We’re a certified Great Place to Work®, seven years in a row!
Please note: Kepler is managing recruitment for this contract position directly. We are not accepting agency submissions or unsolicited candidate profiles for this role. Any profiles submitted by an agency without a signed agreement and prior written authorization from Kepler’s Talent Acquisition team will not be eligible for a placement fee.
We’re on the hunt for a top-tier FPGA Digital Design Engineer for a 6+ month contract to develop the next generation of our satellites.
At Kepler, you’ll have the opportunity to work with a dedicated team of engineers building the Kepler spacecraft. You will be responsible for the design and implementation of FPGA code either with a focus on DSP algorithms to modulate and demodulate signals on board our software defined radio (SDR), or embedded systems interfacing with processors and peripherals. To be effective you will need to participate in all phases of FPGA design flow (Simulation, Synthesis, Place & Route, Timing Closure and Hardware Testing). A good understanding of the intricacies of FPGA development would make a candidate standout.
Key Responsibilities:
- Develop custom IP for new features of the Kepler satellite digital payloads
- Iterate on current DSP and interface designs to improve reliability
- Work with IP core vendors to integrate new functionality into the Kepler designs
- Work with lead engineers in developing the communications and network architecture of our future satellite constellation
- Participate in conceptual design studies of new spacecraft
Required Skills & Qualifications:
- Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent
- 5+ yr. working experience with FPGA/RTL design
- Verilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilog
- Xilinx FPGA(s). Specifically, Zynq and UltraScale
- Solid understanding of timing principles, including clock domain crossing and timing closure
- Strong scripting skills (e.g Python, Tcl, csh/bash, etc.)
- Experience with FPGA tools (e.g Vivado, Quartus), HDL Simulation Tools (ModelSim)
Bonus Points:
- Masters of Science in Computer/Electrical Engineering, or equivalent
- Experience in coherent digital demodulation of waveforms such as BPSK, QPSK, QAM
- Experience with memory mapped interfaces such as AXI, Wishbone, Avalon
- Experience with high-speed transceivers for protocols such as JESD204B, PCIe, SATA
- Experience with Linting tools, Questa Sim or Riviera-Pro
- Experience with Xilinx Versal and RFSoC
- Experience designing printed circuit boards
- Knowledge of radio-frequency electronics design
Actual total compensation will be determined at the Company’s discretion and is based on a variety of job-related factors, which may include, but are not limited to, relevant knowledge, skills, experience, performance, and education and/or training. The Company encourages all qualified applicants to apply, even if the posted salary range does not align with their expectations, as it does not reflect our total compensation package.
Job Type: This is for a current vacancy
Employment Equity & Accommodation Statement
Kepler Communications is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applications from all qualified individuals, including women, Indigenous peoples, persons with disabilities, members of visible minorities, and people of all sexual orientations and gender identities.
If you require accommodation during any stage of the recruitment process, please contact our People & Culture team at [email protected], and we will work with you to meet your needs.
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