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Analog Devices

Engineer, Design Verification Engineering

Reposted 14 Days Ago
Be an Early Applicant
In-Office or Remote
8 Locations
Mid level
In-Office or Remote
8 Locations
Mid level
The role involves improving simulation productivity, developing verification tools, consulting on best practices, and supporting verification methodologies within the team.
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About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

The Engineering Enablement team is responsible for providing tools, methodologies, and support to engineering teams to accelerate product development across the company. This position is for an opening in the “Systems Verification and Validation team” within the Engineering Enablement organization in the CTO Office. This team works to define and promote the adoption of verification best practices, including Metric-driven verification, UVM, Formal, FuSA, Security, Portable Stimulus, Emulation and FPGA prototyping technologies. This role is focused on developing and supporting product lines on ADI proprietary and industry standard “Digital Systems Verification and Infrastructure” flows and deployment of industry-leading verification tools, best practices, and methodologies across business units at ADI. 
Job Responsibilities:

  • 3rd party, industry-standard simulator productivity improvements and breakthrough innovations, integration into ADI DV solutions and creating differentiating solutions
  • Evaluate, utilize existing and develop new verification infrastructure frameworks, tools, and methodologies to enhance the verification process for efficiency and quality
  • Consulting design teams on verification best practices and approaches and providing the right solutions
  • Training, deployment, and support of verification methodologies within ADI
  • Engaging with EDA vendors to influence their development roadmaps to meet ADI’s requirements into the future

 
Job Requirements:

  • BS/MS degree in Electrical/Electronics/Computer Engineering with 2-4 years of experience working in IC Design, Verification, or EDA/CAD Engineering field
  • Strong hands-on experience in Cadence/Synopsys simulation and debug tools like Xcelium/VCS, vManager, Verisium, Verdi or similar tools is required
  • Proficient in Verilog, SystemVerilog and UVM
  • Proficient in automation and scripting languages like Perl, Python, and shell scripting
  • Proficient in version control systems such as Perforce, SVN, SOS
  • Ability to manage multiple tasks and work effectively in a fast-paced environment
  • Able to communicate effectively
  • Good debugging and analytical skills.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: Normal Time (Philippines)

Top Skills

Cadence
Perforce
Perl
Python
Shell Scripting
Sos
Svn
Synopsys
Systemverilog
Uvm
Vcs
Verdi
Verilog
Verisium
Vmanager
Xcelium

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