Jobs at Blue Origin

Lead design and implementation of multi-threaded embedded C/C++ software for Linux/RTOS/bare-metal on multi-core SoCs. Develop drivers and data/control plane functions for RF, antenna, and optical systems; integrate software with hardware, debug using SW/HW tools, champion CI/CD and TDD, and mentor junior engineers. Collaborate across teams to ensure performance, reliability, and secure high-speed data handling for space-based communications.

Lead the development of satellite communications ground systems, managing hardware, software, and systems engineering teams from concept to production.

Design, implement, and operate visualization software for a dynamic satellite and terrestrial network. Build geospatial and graph-based views, backend services and APIs, data delivery mechanisms, playback and event-reconstruction tools, and tools for tracing, filtering, and investigating network state and incidents. Partner with network and systems engineers to optimize performance, security, observability, and resilience.

Lead end-to-end technical programs for satellite communications systems, coordinating multidisciplinary teams (RF, ASIC/FPGA, embedded software, hardware, mechanical, manufacturing). Manage schedules, risks, vendors, prototypes, integration, validation, NPI, production ramp, and executive reporting while ensuring cross-functional alignment of requirements, interfaces, and deliverables.

Develop and own end-to-end, high-fidelity simulation frameworks for large multi-beam phased-array satellite communication systems. Model digital/hybrid beamforming, array performance, RF impairments, satellite geometry, and link budgets. Perform Monte Carlo and corner-case analysis, generate coverage/SINR maps, evaluate architecture tradeoffs, and translate results into antenna, RF, and digital implementation requirements. Collaborate with cross-functional teams and support correlation with hardware measurements and system testing.

Lead verification planning and execution for complex ASIC/SoC digital subsystems. Develop UVM testbenches, reference models, scoreboards, protocol monitors, and assertions. Drive coverage closure, regression health, and verification signoff. Identify corner cases, collaborate across design, systems, DFT, firmware, and physical design, and support emulation, prototyping, and post-silicon debug.

Architect and build TeraWave Point of Presence infrastructure, implement and optimize wire-speed dataplane using DPDK/VPP, tune IP networking stacks (BGP/OSPF), drive performance engineering at the software-hardware interface, mentor engineers, and integrate PoP systems with the broader satellite communications ecosystem.

Lead RTL-to-GDS physical implementation of SoCs for space applications, perform signoff closure (STA, PV, LEC, EM/IR), debug timing, integrate mixed-signal verification, develop PV runsets and flow automation, implement DFT, collaborate with front-end and analog teams, interface with foundries, and support post-silicon validation.

Design and layout complex multi-layer PCBs for mmWave/RF, high-speed digital, mixed-signal, and high-power systems. Perform stackup and routability studies, signal integrity analysis, create DRCs and fabrication/assembly documentation, work with fabricators/CMs, support board bring-up and space-environment design considerations.

Lead the design and development of mixed-signal subsystems, focusing on architecture, specifications, modeling, and integration for advanced communication and data conversion SoCs.

Lead the design and implementation of high-performance PoP infrastructure, optimize networking software, and mentor engineering teams at Blue Origin.

Own signal and power integrity for RF/mixed-signal and mmWave IC packaging. Perform HFSS and EM simulation for high-speed signals and PDNs, model and characterize RF/mmWave packages, collaborate with RFIC/mmWave/ASIC/SoC and package layout teams, lead SI/PI package delivery, and produce documentation and specifications supporting design reviews.

Lead end-to-end ASIC/SoC design and verification for TeraWave RFIC/ASICs, from requirements and RTL through FPGA/silicon bring-up. Responsibilities include complex subsystem and SoC verification, DSP/modem design, ARM integration, high-speed interface integration, performance/power optimization, backend support (DFT/STA), formal verification, and post-silicon validation.

Design and develop RFICs and mixed-signal ASICs using Cadence Virtuoso and Spectre RF. Build analog models and verification methodologies, create and execute pre/post-silicon test plans, trade off noise/linearity/power, support lab integration and troubleshooting, resolve layout and timing issues, collaborate with systems/firmware/architecture teams, and adopt AI-based methods across design, simulation, verification, characterization, and manufacturing.

Lead design and development of modem PHY IP for Terawave ASIC and prototypes. Translate algorithms into hardware architectures, build bit-accurate models, perform trade studies, define interfaces, support FPGA/silicon bring-up, collaborate with systems/ASIC/RF/verification teams, and analyze simulation/emulation/lab/silicon data to improve PHY performance and validation.

Lead verification of modem PHY IP: define strategies, build block/subsystem verification environments, create testbenches and coverage, correlate RTL with reference models, debug RTL and integration issues, support emulation/FPGA/prototyping and post-silicon debug, and drive regression automation and CI for high-throughput wireless ASIC platforms.

Lead design and ownership of system-level integration and test architecture for a satellite communications constellation. Define test strategy, build progressive integrated test facilities (link-level to full-system), integrate ground terminal validation, embed tests in CI/CD pipelines, size and procure major test infrastructure, and collaborate across payload, satellite, and network teams to ensure end-to-end validation, regulatory compliance, and production-scale acceptance testing.

Lead DFX strategy for mechanical systems from concept to high-rate production. Drive DFM/DFA/DFR/DFC, tolerance analysis, GD&T, DOE, NPI, factory automation, failure analysis, and supplier readiness. Recruit and grow a global DFX team, establish assembly processes across multiple disciplines, and define DFX review gates and metrics to improve yield, reliability, and cost.

Design and develop mechanical hardware for the TeraWave satellite constellation and ground systems. Perform structural and thermal analyses, create CAD models/drawings/BOMs, support integration and environmental testing, apply GD&T, lead design reviews, mitigate risks, and collaborate with systems, electrical, manufacturing teams and suppliers.

Lead end-to-end hardware architecture for a phased-array satellite user terminal: define system block diagrams, select SoCs and high-speed components, resolve RF/electrical/mechanical interfaces, design power/thermal systems for beamforming, drive manufacturability with CMs, and establish validation and global compliance (FCC/CE/ETSI).